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| 74VCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold January 2000 Revised March 2000 74VCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold and 26 Series Resistors in Outputs General Description The VCXH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state. The VCXH162373 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level. The VCXH162373 is also designed with 26 series resistors in the outputs. This design reduces line noise in applications such as memory address driver, clock drivers and bus transceivers/transmitters. The 74VCXH162373 is designed for low voltage (1.65V to 3.6V) VCC applications with output compatibility up to 3.6V. The 74VCXH162373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. Features s 1.65V-3.6V VCC supply operation s 3.6V tolerant control inputs and outputs s Bushold on data inputs eliminates the need for external pull-up/pull-down resistors s 26 series resistors in outputs s tPD (In to On) 3.3 ns max for 3.0V to 3.6V VCC 4.5 ns max for 2.3V to 2.7V VCC 9.0 ns max for 1.65V to 1.95V VCC s Static Drive (IOH/IOL) 12 mA @ 3.0V VCC 8 mA @ 2.3V VCC 3 mA @ 1.65V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Ordering Number 74VCXH162373MTD 74VCXH162373MTX (Note 1) Package Number MTD48 MTD48 Package Description 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TUBES] 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Note 1: Use this Order Number to receive devices in Tape and Reel. Logic Symbol Pin Descriptions Pin Names OEn LEn I0-I15 O0-O15 Description Output Enable Input (Active LOW) Latch Enable Input Bushold Inputs Outputs (c) 2000 Fairchild Semiconductor Corporation DS500227 www.fairchildsemi.com 74VCXH162373 Connection Diagram Truth Tables Inputs LE1 X H H L OE1 H L L L Inputs LE2 X H H L OE2 H L L L I8-I15 X L H X I0-I7 X L H X Outputs O0-O7 Z L H O0 Outputs O8-O15 Z L H O0 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, control inputs may not float) Z = High Impedance O0 = Previous O0 before HIGH-to-LOW of Latch Enable Functional Description The 74VCXH162373 contains sixteen edge D-type latches with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the Latch Enable (LEn) input is HIGH, data on the In enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its I input changes. When LEn is LOW, the latches store information that was present on the I inputs a setup time preceding the HIGH-to-LOW transition on LEn. The 3STATE outputs are controlled by the Output Enable (OEn) input. When OEn is LOW the standard outputs are in the 2state mode. When OEn is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the latches. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74VCXH162373 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) DC Input Voltage (VI) OEn, LEn I0 - I15 Output Voltage (VO) Outputs 3-STATED Outputs Active (Note 3) DC Input Diode Current (IIK) VI < 0V DC Output Diode Current (IOK) VO < 0V VO > VCC DC Output Source/Sink Current (IOH/IOL) DC VCC or GND Current per Supply Pin (ICC or GND) Storage Temperature Range (TSTG) 100 mA -65C to +150C 50 mA -50 mA +50 mA -50 mA -0.5V to +4.6V -0.5V to VCC +0.5V -0.5V to 4.6V -0.5V to VCC + 0.5V -0.5V to +4.6V Recommended Operating Conditions (Note 4) Power Supply Operating Data Retention Only Input Voltage Output Voltage (VO) Output in Active States Output in "OFF" State Output Current in IOH/IOL VCC = 3.0V to 3.6V VCC = 2.3V to 2.7V VCC = 1.65V to 2.3V Free Air Operating Temperature (TA) Minimum Input Edge Rate (t/V) VIN = 0.8V to 2.0V, VCC = 3.0V 10 ns/V Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 3: IO Absolute Maximum Rating must be observed. Note 4: Floating or unused control inputs must be held HIGH or LOW. 1.65V to 3.6V 1.2V to 3.6V -0.3V to VCC 0V to VCC 0.0V to 3.6V 12 mA 8 mA 3 mA -40C to +85C DC Electrical Characteristics (2.7V < VCC 3.6V) Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH = -100 A IOH = -6 mA IOH = -8 mA IOH = -12 mA VOL LOW Level Output Voltage IOL = 100 A IOL = 6 mA IOL = 8 mA IOL = 12 mA II II(HOLD) II(OD) IOZ IOFF ICC ICC Input Leakage Current Bushold Input Minimum Drive Hold Current Bushold Input Over-Drive Current to Change State 3-STATE Output Leakage Power-OFF Leakage Current Quiescent Supply Current Increase in ICC per Input Control Pins Data Pins 0 VI 3.6V VI = V CC or GND VIN = 0.8V VIN = 2.0V (Note 5) (Note 6) 0 VO 3.6V VI = V IH or VIL 0 (VO) 3.6V VI = V CC or GND VCC (VO) 3.6V (Note 7) VIH = VCC -0.6V Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: Outputs disabled or 3-STATE only. Conditions VCC (V) 2.7-3.6 2.7-3.6 2.7-3.6 2.7 3.0 3.0 2.7-3.6 2.7 3.0 3.0 2.7-3.6 2.7-3.6 3.0 3.0 3.6 3.6 2.7-3.6 0 2.7-3.6 2.7-3.6 2.7-3.6 Min 2.0 Max Units V 0.8 VCC - 0.2 2.2 2.4 2.2 0.2 0.4 0.55 0.8 5.0 5.0 75 -75 450 -450 10 10 20 20 750 V V V V V V V V V A A A A A A A A A 3 www.fairchildsemi.com 74VCXH162373 DC Electrical Characteristics (2.3V VCC 2.7V) Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH = -100 A IOH = -4 mA IOH = -6 mA IOH = -8 mA VOL LOW Level Output Voltage IOL = 100 A IOL = 6 mA IOL = 8 mA II II(HOLD) II(OD) IOZ IOFF ICC Input Leakage Current Bushold Input Minimum Drive Hold Current Bushold Input Over-Drive Current to Change State 3-STATE Output Leakage Power-OFF Leakage Current Quiescent Supply Current Control Pins Data Pins 0 VI 3.6V VI = VCC or GND VIN = 0.7V VIN = 1.6V (Note 8) (Note 9) 0 VO 3.6V VI = VIH or VIL 0 (VO) 3.6V VI = VCC or GND VCC (VO) 3.6V (Note 10) Note 8: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 9: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 10: Outputs disabled or 3-STATE only. Conditions V CC (V) 2.3 - 2.7 2.3 - 2.7 2.3 - 2.7 2.3 2.3 2.3 2.3 - 2.7 2.3 2.3 2.3 - 2.7 2.3 - 2.7 2.3 2.3 2.7 2.7 2.3 - 2.7 0 2.3 - 2.7 2.3 - 2.7 Min 1.6 Max Units V 0.7 VCC - 0.2 2.0 1.8 1.7 0.2 0.4 0.6 5.0 5.0 45 -45 300 -300 10 10 20 20 V V V V V V V V A A A A A A A A DC Electrical Characteristics (1.65V VCC < 2.3V) Symbol VIH VIL VOH VOL II II(HOLD) II(OD) IOZ IOFF ICC Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Leakage Current Bushold Input Minimum Drive Hold Current Bushold Input Over-Drive Current to Change State 3-STATE Output Leakage Power-OFF Leakage Current Quiescent Supply Current Control Pins Data Pins IOH = -100 A IOH = -3 mA IOL = 100 A IOL = 3 mA 0 VI 3.6V VI = VCC or GND VIN = 0.57V VIN = 1.07V (Note 11) (Note 12) 0 VO 3.6V VI = VIH or VIL 0 (VO) 3.6V VI = VCC or GND VCC (VO) 3.6V (Note 13) Note 11: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 12: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 13: Outputs disabled or 3-STATE only. Conditions VCC (V) 1.65 - 2.3 1.65 - 2.3 1.65 - 2.3 1.65 1.65 - 2.3 1.65 1.65 - 2.3 1.65 - 2.3 1.65 1.65 1.95 1.95 1.65 - 2.3 0 1.65 - 2.3 1.65 - 2.3 Min 0.65 x VCC Max Units V 0.35 x VCC VCC - 0.2 1.25 0.2 0.3 5.0 5.0 25 -25 200 -200 10 10 20 20 V V V V V A A A A A A A A www.fairchildsemi.com 4 74VCXH162373 AC Electrical Characteristics (Note 14) T A = -40C to +85C, CL = 30 pF, RL = 500 Symbol Parameter V CC = 3.3V 0.3V Min tPHL, tPLH tPHL, tPLH tPZL, tPZH tPLZ, tPHZ tS tH tW tOSHL tOSLH Prop Delay In to On Prop Delay LE to On Output Enable Time Output Disable Time Setup Time Hold Time Pulse Width Output to Output Skew (Note 15) 0.8 0.8 0.8 0.8 1.5 1.0 1.5 0.5 Max 3.3 3.6 3.9 4.0 V CC = 2.5V 0.2V Min 1.0 1.0 1.0 1.0 1.5 1.0 1.5 0.5 Max 4.5 4.9 5.4 4.4 V CC = 1.8V 0.15V Min 1.5 1.5 1.5 1.5 2.5 1.0 4.0 0.75 Max 9.0 9.8 9.8 7.9 ns ns ns ns ns ns ns ns Units Note 14: For CL = 50PF, add approximately 300 ps to the AC maximum specification. Note 15: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Dynamic Switching Characteristics Symbol VOLP Parameter Quiet Output Dynamic Peak VOL Conditions CL = 30 pF, VIH = VCC, VIL = 0V V CC (V) 1.8 2.5 3.3 VOLV Quiet Output Dynamic Valley VOL CL = 30 pF, VIH = VCC, VIL = 0V 1.8 2.5 3.3 VOHV Quiet Output Dynamic Valley VOH CL = 30 pF, VIH = VCC, VIL = 0V 1.8 2.5 3.3 TA = +25C Typical 0.15 0.25 0.35 -0.15 -0.25 -0.35 1.55 2.05 2.65 V V V Units Capacitance Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Conditions VCC = 1.8V, 2.5V or 3.3V, VI = 0V or VCC VI = 0V or VCC, VCC = 1.8V, 2.5V or 3.3V VI = 0V or VCC, f = 10 MHz, VCC = 1.8V, 2.5V or 3.3V TA = +25C Typical 6 7 20 Units pF pF pF 5 www.fairchildsemi.com 74VCXH162373 AC Loading and Waveforms TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ SWITCH Open 6V at VCC = 3.3 0.3V; VCC x 2 at VCC = 2.5 0.2V; 1.8V 0.15V GND FIGURE 1. AC Test Circuit FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 3. 3-STATE Output HIGH Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output LOW Enable and Disable Times for Low Voltage Logic FIGURE 5. Propagation Delay, Pulse Width and tREC Waveforms Symbol Vmi Vmo VX VY FIGURE 6. Setup Time, Hold Time and Recovery Time for Low Voltage Logic VCC 3.3V 0.3V 1.5V 1.5V VOL +0.3V VOH -0.3V 2.5V 0.2V VCC/2 VCC/2 VOL +0.15V VOH -0.15V 1.8V 0.15V VCC/2 VCC/2 VOL +0.15V VOH -0.15V www.fairchildsemi.com 6 74VCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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